News Summary:    AMD has begun production ramp of its 6th Gen AMD EPYC™ CPUs, codenamed &#34;Venice,&#34; marking a major milestone for the AMD and TSMC collaboration on 2nm technology&#34;Venice&#34; is the first HPC product in

AMD Announces Production Ramp of Next-Generation AMD EPYC Processor "Venice" on TSMC 2nm Process Technology

AMD's 6th Gen EPYC Production Ramp Signals AI Infrastructure Growth

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  <section data-block="information">
    <h3>Information</h3>
    <p>News Summary:    AMD has begun production ramp of its 6th Gen AMD EPYC™ CPUs, codenamed &amp;#34;Venice,&amp;#34; marking a major milestone for the AMD and TSMC collaboration on 2nm technology&amp;#34;Venice&amp;#34; is the first HPC product in</p>
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  <section data-block="ai-summary-paragraph">
    <h3>AI Summary</h3>
    <p>AMD has initiated the production ramp of its next-gen EPYC CPUs, &#039;Venice,&#039; on TSMC&#039;s 2nm technology. This launch positions AMD to capitalize on the growing demand for AI infrastructure, potentially driving revenue and market share upswing in the data center sector.</p>
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  <section data-block="ai-summary-bullets">
    <h3>Key Points</h3>
    <ul><li>AMD starts production of 6th Gen EPYC CPUs, codenamed &#039;Venice.&#039;</li><li>First HPC product to utilize TSMC&#039;s advanced 2nm technology.</li><li>Demand for AI infrastructure drives &#039;Venice&#039; launch.</li><li>&#039;Verano&#039; will follow &#039;Venice&#039; with enhanced memory support.</li></ul>
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  <section data-block="companies-mentioned">
    <h3>Companies Mentioned</h3>
    <ul><li><strong>TSMC (TSM)</strong>: Collaborating with AMD on advanced manufacturing processes, vital for future growth.</li></ul>
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  <section data-block="category">
    <h3>Corporate Developments</h3>
    <p>This news fits into &#039;Corporate Developments&#039; as it involves AMD&#039;s strategic production ramp and partnerships, directly impacting its growth strategy in AI computing and data centers.</p>
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  <section data-block="market-moving">
    <h3>Market-Moving</h3>
    <ul><li>Ramp of &#039;Venice&#039; CPU could lead to increased server market share for AMD.</li><li>Growing demand for AI infrastructure may drive significant revenues for AMD.</li><li>Partnership with TSMC strengthens AMD&#039;s production capabilities and competitive edge.</li></ul>
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  <section data-block="key-facts">
    <h3>Key Facts</h3>
    <ul><li>AMD&#039;s EPYC &#039;Venice&#039; CPUs are now in production as of May 2026.</li><li>&#039;Venice&#039; is the first high-performance computing product on TSMC&#039;s 2nm process.</li><li>Future ramp plans to expand production to TSMC&#039;s Arizona facility.</li><li>&#039;Verano&#039; will follow &#039;Venice,&#039; optimizing performance for cloud workloads.</li></ul>
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  <section data-block="trading-thesis">
    <h3>Trading Thesis</h3>
    <p>Buy AMD as production ramp of &#039;Venice&#039; boosts AI infrastructure positioning in the coming months.</p>
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<link type="text/css" rel="stylesheet" href="https://www.globenewswire.com/styles/gnw_nitf.css"></link><p>News Summary:</p>    <ul type="disc"><li style="margin-top:5pt; margin-bottom:5pt;">AMD has begun production ramp of its 6th Gen AMD EPYC&#x2122; CPUs, codenamed "Venice," marking a major milestone for the AMD and TSMC collaboration on 2nm technology</li><li style="margin-top:5pt; margin-bottom:5pt;">"Venice" is the first HPC product in the industry to achieve production ramp on TSMC advanced 2nm technology</li><li style="margin-top:5pt; margin-bottom:5pt;">Critical milestone achieved as agentic AI workloads drive demand for accelerated AI infrastructure deployments</li><li style="margin-top:5pt; margin-bottom:5pt;">AMD continues to drive 2nm product expansion with "Verano" a follow on to "Venice" with industry leading integration of LPDDR for growing memory demand in agentic AI workloads<br></br><br></br></li></ul>    <p>SANTA CLARA, Calif., May  21, 2026  (GLOBE NEWSWIRE) -- AMD (NASDAQ:<a class="ticker" href="https://www.benzinga.com/quote/AMD">AMD</a>) today announced that its next-generation AMD EPYC&#x2122; processor, codenamed "Venice," is ramping production in Taiwan on TSMC's advanced 2nm process technology, with future plans to ramp production at TSMC's Arizona fabrication facility. The milestone in the execution of the AMD data center CPU roadmap demonstrates continued progress toward delivering the leadership performance and energy efficiency required for next-generation cloud, enterprise and AI infrastructure. "Venice" is the first high-performance computing (HPC) product in the industry to enter production on TSMC's advanced 2nm process technology.</p>    <p>"Ramping ‘Venice' on TSMC 2nm process technology marks an important step forward in accelerating the next generation of AI infrastructure," said Dr. Lisa Su, chair and CEO, AMD. "As AI and agentic workloads scale rapidly, customers need platforms that can move from innovation to production faster. Our deep partnership with TSMC is helping AMD bring leadership compute technologies to market with the speed and scale required to meet this moment."</p>    <p>As AI adoption expands from training and inference to increasingly complex agentic workloads, the CPU is becoming even more critical to scaling AI infrastructure, coordinating data movement, networking, storage, security and system orchestration across the data center. The ramp of "Venice" comes as AMD continues to build momentum in the server market, reflecting growing customer demand for EPYC processors to power modern cloud, enterprise, HPC and AI deployments.</p>    <p>The "Venice" ramp in Taiwan and plans to ramp at TSMC Arizona reflect AMD's focus on strengthening its geographically diverse advanced manufacturing footprint. By pairing next-generation EPYC processor innovation with advanced manufacturing capacity across the globe, AMD is expanding the foundation needed to support customers as they deploy and scale AI infrastructure.</p>    <p>"We are pleased to see AMD continue to make strong progress with its next-generation EPYC processor on our advanced 2nm process technology," said Dr. C.C. Wei, Chairman and CEO, TSMC. "Our close collaboration with AMD reflects the importance of pairing leadership process technology with advanced design innovation to enable the next era of high-performance and AI computing."</p>    <p>AMD also plans to extend TSMC 2nm process technology across its data center CPU roadmap with "Verano," a 6th Gen EPYC processor optimized for performance-per-dollar-per-watt leadership. Designed to support cloud and AI computing workloads, "Verano" is expected to build on the AMD EPYC platform with advanced memory innovations, including LPDDR, to deliver the CPU performance, bandwidth and efficiency required for increasingly power constrained workloads and applications.</p>    <p>AMD and TSMC's partnership spans the technologies needed to scale modern data center computing, from TSMC 2nm process technology for next-generation CPUs to advanced packaging technologies, including TSMC's SoIC<sup>&#xAE;</sup>-X and CoWoS<sup>&#xAE;</sup>-L, used across AMD's broader AI and data center portfolio. With "Venice" ramping on TSMC 2nm, AMD is advancing the CPU foundation for AI infrastructure while continuing to leverage TSMC's process and packaging leadership to deliver increasingly integrated compute platforms at scale.</p>    <p><strong>About AMD</strong></p>    <p align="justify">AMD (NASDAQ:<a class="ticker" href="https://www.benzinga.com/quote/AMD">AMD</a>) drives innovation in high-performance and AI computing to solve the world's most important challenges. Today, AMD technology powers billions of experiences across cloud and AI infrastructure, embedded systems, AI PCs and gaming. With a broad portfolio of AI-optimized CPUs, GPUs, networking and software, AMD delivers full-stack AI solutions that provide the performance and scalability needed for a new era of intelligent computing. Learn more at <a href="http://www.amd.com" rel="nofollow" target="_blank">www.amd.com</a>.</p>    <p><strong>Cautionary Statement</strong></p>    <p align="justify">This press release contains forward-looking statements concerning Advanced Micro Devices, Inc. (AMD) such as the ramping of AMD's 6th Gen AMD EPYC&#x2122; CPUs and future plans and expectations of its partnership with TSMC, which are made pursuant to the Safe Harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are commonly identified by words such as &#34;would,&#34; &#34;may,&#34; &#34;expects,&#34; &#34;believes,&#34; &#34;plans,&#34; &#34;intends,&#34; &#34;projects&#34; and other terms with similar meaning. Investors are cautioned that the forward-looking statements in this press release are based on current beliefs, assumptions and expectations, speak only as of the date of this press release and involve risks and uncertainties that could cause actual results to differ materially from current expectations. Such statements are subject to certain known and unknown risks and uncertainties, many of which are difficult to predict and are generally beyond AMD&#39;s control, that could cause actual results and other future events to differ materially from those expressed in, or implied or projected by, the forward-looking information and statements. Material factors that could cause actual results to differ materially from current expectations include, without limitation, the following: impact of government actions and regulations such as export regulations, import tariffs, trade protection measures, and licensing requirements; competitive markets in which AMD's products are sold; the cyclical nature of the semiconductor industry; market conditions of the industries in which AMD products are sold; AMD's ability to introduce products on a timely basis with expected features and performance levels; loss of a significant customer; economic and market uncertainty; quarterly and seasonal sales patterns; AMD&#39;s ability to adequately protect its technology or other intellectual property; unfavorable currency exchange rate fluctuations; ability of third party manufacturers to manufacture AMD&#39;s products on a timely basis in sufficient quantities and using competitive technologies; availability of essential equipment, materials, components (such as memory supply), substrates or manufacturing processes; ability to achieve expected manufacturing yields for AMD's products; AMD&#39;s ability to generate revenue from its semi-custom SoC products; potential security vulnerabilities; potential security incidents including IT outages, data loss, data breaches and cyberattacks; uncertainties involving the ordering and shipment of AMD's products; AMD's reliance on third-party intellectual property to design and introduce new products; AMD&#39;s reliance on third-party companies for design, manufacture and supply of motherboards, software, memory and other computer platform components; AMD&#39;s reliance on Microsoft and other software vendors&#39; support to design and develop software to run on AMD's products; AMD's reliance on third-party distributors and add-in-board partners; impact of modification or interruption of AMD's internal business processes and information systems; compatibility of AMD's products with some or all industry-standard software and hardware; costs related to defective products; failure to maintain an efficient supply chain as customer demand changes; AMD&#39;s ability to rely on third party supply-chain logistics functions; AMD's ability to effectively control sales of its products on the gray market; impact of climate change on AMD's business; AMD's ability to realize its deferred tax assets; potential tax liabilities; current and future claims and litigation; impact of environmental laws, conflict minerals related provisions and other laws or regulations; evolving expectations from governments, investors, customers and other stakeholders regarding corporate responsibility matters; issues related to the responsible use of AI; restrictions imposed by agreements governing AMD's notes, the guarantees of Xilinx's notes and the revolving credit agreement; AMD's ability to satisfy financial obligations under guarantees, leases and other commercial commitments; impact of acquisitions, joint ventures and/or investments on AMD's business and AMD's ability to integrate acquired businesses; impact of any impairment of the combined company's assets; political, legal and economic risks and natural disasters; future impairments of technology license purchases; AMD's ability to attract and retain key employees; and AMD's stock price volatility. Investors are urged to review in detail the risks and uncertainties in AMD's Securities and Exchange Commission filings, including but not limited to AMD's most recent reports on Forms 10-K and 10-Q.</p>    <p align="left"><strong>Media Contact:</strong><br></br><strong>Phil Hughes</strong><br></br>AMD Communications<br></br>512-865-9697<br></br><a href="mailto:phil.hughes@amd.com" rel="nofollow" target="_blank">phil.hughes@amd.com</a><br></br>        <br></br><strong>Investor Contact:</strong><br></br><strong>Liz Stine</strong><br></br>AMD Investor Relations<br></br>720-652-3965<br></br><a href="mailto:liz.stine@amd.com" rel="nofollow" target="_blank">liz.stine@amd.com</a></p> <img alt="" class="__GNW8366DE3E__IMG" src="https://www.globenewswire.com/newsroom/ti?nf=OTcyNDQ2NiM3NjE1MTI1IzIwMDcxMTY="></img> <br></br><img alt="" src="https://ml.globenewswire.com/media/ZDI3YWE3YmQtNzllMC00MmI4LWI0MDAtMTIzNmQzYTgxZThiLTEwMTg2ODktMjAyNi0wNS0yMS1lbg==/tiny/Advanced-Micro-Devices-Inc-.png" referrerpolicy="no-referrer-when-downgrade"></img><p><a href="https://www.globenewswire.com/NewsRoom/AttachmentNg/9782a337-07ac-424b-9c5a-f9cde47d8d55"><img src="https://ml.globenewswire.com/media/9782a337-07ac-424b-9c5a-f9cde47d8d55/small/amd-logo-black-jpg.jpg" border="0" width="150" height="58" alt="Primary Logo"></img></a></p>

AMD has initiated the production ramp of its next-gen EPYC CPUs, 'Venice,' on TSMC's 2nm technology. This launch positions AMD to capitalize on the growing demand for AI infrastructure, potentially driving revenue and market share upswing in the data center sector.

AMD Announces Production Ramp of Next-Generation AMD EPYC Processor "Venice" on TSMC 2nm Process Technology

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