
FuriosaAI, a builder of high-performance inference silicon, today announced a strategic partnership with Broadcom (NASDAQ:AVGO) to develop its third-generation AI accelerator. This collaboration evolves Furiosa&#39;s Tensor

<p xmlns="http://www.w3.org/1999/xhtml">
FuriosaAI, a builder of high-performance inference silicon, today announced a strategic partnership with Broadcom (NASDAQ:<a class="ticker" href="https://www.benzinga.com/quote/AVGO">AVGO</a>) to develop its third-generation AI accelerator. This collaboration evolves Furiosa's Tensor Contraction Processor (TCP) architecture into a scale-up inference platform engineered for serving frontier agentic systems at massive scale of global hyperscale environment.

</p><p xmlns="http://www.w3.org/1999/xhtml">
Moving beyond a traditional ASIC partnership, Furiosa and Broadcom are combining FuriosaAI&#39;s AI architecture and software stack with Broadcom&#39;s leadership in scale-up AI networking solutions to build a rack-scale inference platform.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">RNGD: A proven foundation for production inference</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
The partnership builds on the commercial maturity of RNGD, FuriosaAI's data center inference chip. Currently in mass production and fabricated at TSMC's 5nm advanced process, RNGD is a 180W, PCIe-based accelerator designed for high-performance LLM and agentic AI workloads.

</p><p xmlns="http://www.w3.org/1999/xhtml">
RNGD has been validated in production environments by global leaders including Samsung SDS and LG AI Research, proving the efficiency of the TCP architecture. By providing high throughput and low latency within a power-constrained envelope, RNGD establishes the architectural foundation for the significant enhancements being co-developed with Broadcom for the third-generation platform.

</p><p xmlns="http://www.w3.org/1999/xhtml">
&#34;Inference performance is no longer defined solely by raw compute. It is increasingly a function of data reuse and communication efficiency across servers and racks,&#34; said Charlie Kawwas, Ph. D., president of Broadcom's Semiconductor Solutions Group, &#34;By pairing Furiosa's TCP architecture with Broadcom's market-leading XPU Technology and IP Platform, Ethernet scale-up and fabric switches, we are building a platform that addresses the key bottlenecks of large-scale agentic AI.&#34;

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Scalable chiplet architecture and advanced networking</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
Furiosa's third-generation chip will feature a 2nm compute die, a dedicated IO die for scale-up networking, and HBM4/4E memory, utilizing Broadcom's advanced packaging capabilities to integrate multiple silicon dies into a high-performance AI inference accelerator. By incorporating Broadcom's scale-up Ethernet technologies, the system delivers low-latency, high-bandwidth all-to-all interconnect across hundreds of chips at rack scale.

</p><p xmlns="http://www.w3.org/1999/xhtml">
"Bringing together Broadcom's infrastructure capabilities and Furiosa's Tensor Contraction Processor architecture and its industry-defining software stack allows us to move beyond the chip level and deliver a comprehensive solution for the token factory era," said Furiosa Cofounder and CEO June Paik. "Having proven the performance and efficiency of our architecture with RNGD, our second-generation chip now in mass production with TSMC, we will deliver a third-generation inference solution that offers industry-leading performance per watt for even the largest, most complex frontier AI models and agentic workloads."

</p><p xmlns="http://www.w3.org/1999/xhtml">
The design is optimized for demanding real-world AI workloads, including intensive post-training sampling. By focusing on high-bandwidth data movement rather than the thread management required by GPUs, the chip will deliver higher performance-per-watt and greater token density than state-of-the-art GPUs.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Software designed for flexibility and developer velocity</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
Furiosa's hardware is supported by a software stack that enables developers to deploy quickly, meet demanding throughput and latency requirements, and easily switch to new frontier models and new optimization techniques.

</p><p xmlns="http://www.w3.org/1999/xhtml">
While legacy platforms require extensive hand-tuning of kernels for every new model, Furiosa's SDK leverages a general compiler that automatically maps high-level PyTorch code to silicon. For developers requiring more granular control, Furiosa's Virtual ISA offers a declarative programming model that provides hardware control without the non-deterministic complexity of traditional GPU programming.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Roadmap and availability</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
Sampling is scheduled to begin in the first half of 2028 to support the next decade of AI data center deployments.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">About FuriosaAI</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran engineers from AMD, Qualcomm, and Samsung, Furiosa operates globally with offices in Korea and Silicon Valley. The company has shipped two generations of AI chips based on our proprietary Tensor Contraction Processor (TCP) architecture. Its flagship product, RNGD, runs advanced large language models and agentic AI and is now in mass production. RNGD drops seamlessly into standard, air-cooled data centers to deliver unprecedented &#34;tokens per watt&#34; efficiency, supported by a mature SDK that eliminates the need for vast libraries of hand-tuned kernels. The company has raised $250M through Series C Bridge and works with leading global partners.

</p><p xmlns="http://www.w3.org/1999/xhtml">
For more information, visit furiosa.ai.

</p><p xmlns="http://www.w3.org/1999/xhtml"><img xmlns="http://www.w3.org/1999/xhtml" alt="" src="https://cts.businesswire.com/ct/CT?id=bwnews&amp;sty=20260527775773r2&amp;sid=benz2&amp;distro=nx&amp;lang=en" style="width:0;height:0"></img><span xmlns="http://www.w3.org/1999/xhtml" class="bwct31415"></span></p><p xmlns="http://www.w3.org/1999/xhtml" id="mmgallerylink"><span xmlns="http://www.w3.org/1999/xhtml" id="mmgallerylink-phrase">View source version on businesswire.com: </span><span xmlns="http://www.w3.org/1999/xhtml" id="mmgallerylink-link"><a xmlns="http://www.w3.org/1999/xhtml" href="https://www.businesswire.com/news/home/20260527775773/en/" rel="nofollow">https://www.businesswire.com/news/home/20260527775773/en/</a></span></p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Media contact: <a xmlns="http://www.w3.org/1999/xhtml" rel="nofollow" href="mailto:press@furiosa.ai" shape="rect">press@furiosa.ai</a></b>

</p>

AVGO

FuriosaAI Partners with Broadcom to Build Next-generation Inference Platform for the Agentic Era

Broadcom and FuriosaAI partner on third-generation AI accelerator

<section class="insight" data-version="1">
  <section data-block="information">
    <h3>Information</h3>
    <p>FuriosaAI, a builder of high-performance inference silicon, today announced a strategic partnership with Broadcom (NASDAQ:AVGO) to develop its third-generation AI accelerator. This collaboration evolves Furiosa&amp;#39;s Tensor</p>
  </section>

  <section data-block="ai-summary-paragraph">
    <h3>AI Summary</h3>
    <p>Broadcom and FuriosaAI unveiled a strategic partnership to co-develop a third-generation AI accelerator, expanding RNGD&#039;s architecture into a scale-up rack-scale inference platform for hyperscale data centers. The collaboration combines Furiosa&#039;s TCP with Broadcom&#039;s Ethernet and packaging capabilities to address data movement bottlenecks, aiming for sampling in 1H2028 and mass production later.</p>
  </section>

  <section data-block="ai-summary-bullets">
    <h3>Key Points</h3>
    <ul><li>Broadcom and FuriosaAI partner on third-gen AI accelerator for scale-up inference.</li><li>RNGD-based tech underpins the platform, with 180W PCIe accelerator in mass production.</li><li>Roadmap targets 2nm compute die and HBM4/4E memory; sampling in 2028.</li><li>Software stack enables PyTorch-to-silicon mapping and rack-scale interconnect.</li></ul>
  </section>

  <section data-block="companies-mentioned">
    <h3>Companies Mentioned</h3>
    <ul><li><strong>Broadcom Inc. (AVGO)</strong>: Strategic partner; enabling scale-up AI networking and rack-scale platform.</li><li><strong>FuriosaAI (N/A)</strong>: Private AI silicon developer; provides TCP architecture and RNGD IP.</li><li><strong>RNGD (N/A)</strong>: Furiosa&#039;s data-center inference chip; 180W PCIe accelerator; mass production.</li><li><strong>TSMC (TSM)</strong>: Fabricates RNGD on 5nm process; critical foundry for platform.</li><li><strong>Samsung SDS (N/A)</strong>: Validated RNGD in production environments.</li><li><strong>LG AI Research (N/A)</strong>: Validated RNGD in production environments.</li></ul>
  </section>

  <section data-block="category">
    <h3>Industry News</h3>
    <p>Category: Industry News; reflects a strategic collaboration shaping AI inference hardware and software ecosystems in hyperscale data centers.</p>
  </section>

  <section data-block="market-moving">
    <h3>Market-Moving</h3>
    <ul><li>AVGO exposure to rack-scale AI networking underpins long-term revenue growth.</li><li>Roadmap for 2nm compute die and HBM memory signals multi-year upside.</li><li>Third-gen platform sampling in 1H2028 may create delayed catalysts.</li><li>Furiosa RNGD validation by Samsung SDS and LG AI Research supports system-level demand.</li></ul>
  </section>

  <section data-block="key-facts">
    <h3>Key Facts</h3>
    <ul><li>RNGD is a 180W PCIe-based accelerator.</li><li>RNGD is fabricated on TSMC&#039;s 5nm process.</li><li>Furiosa RNGD second-gen is in mass production.</li><li>Third-gen roadmap includes 2nm compute die and HBM4/4E; sampling 1H2028.</li><li>Furiosa has raised $250M through Series C Bridge.</li></ul>
  </section>

  <section data-block="trading-thesis">
    <h3>Trading Thesis</h3>
    <p>Bullish for AVGO over the next 12–24 months as AI infra partnerships expand.</p>
  </section>
</section>


<p xmlns="http://www.w3.org/1999/xhtml">
FuriosaAI, a builder of high-performance inference silicon, today announced a strategic partnership with Broadcom (NASDAQ:<a class="ticker" href="https://www.benzinga.com/quote/AVGO">AVGO</a>) to develop its third-generation AI accelerator. This collaboration evolves Furiosa's Tensor Contraction Processor (TCP) architecture into a scale-up inference platform engineered for serving frontier agentic systems at massive scale of global hyperscale environment.

</p><p xmlns="http://www.w3.org/1999/xhtml">
Moving beyond a traditional ASIC partnership, Furiosa and Broadcom are combining FuriosaAI&#39;s AI architecture and software stack with Broadcom&#39;s leadership in scale-up AI networking solutions to build a rack-scale inference platform.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">RNGD: A proven foundation for production inference</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
The partnership builds on the commercial maturity of RNGD, FuriosaAI's data center inference chip. Currently in mass production and fabricated at TSMC's 5nm advanced process, RNGD is a 180W, PCIe-based accelerator designed for high-performance LLM and agentic AI workloads.

</p><p xmlns="http://www.w3.org/1999/xhtml">
RNGD has been validated in production environments by global leaders including Samsung SDS and LG AI Research, proving the efficiency of the TCP architecture. By providing high throughput and low latency within a power-constrained envelope, RNGD establishes the architectural foundation for the significant enhancements being co-developed with Broadcom for the third-generation platform.

</p><p xmlns="http://www.w3.org/1999/xhtml">
&#34;Inference performance is no longer defined solely by raw compute. It is increasingly a function of data reuse and communication efficiency across servers and racks,&#34; said Charlie Kawwas, Ph. D., president of Broadcom's Semiconductor Solutions Group, &#34;By pairing Furiosa's TCP architecture with Broadcom's market-leading XPU Technology and IP Platform, Ethernet scale-up and fabric switches, we are building a platform that addresses the key bottlenecks of large-scale agentic AI.&#34;

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Scalable chiplet architecture and advanced networking</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
Furiosa's third-generation chip will feature a 2nm compute die, a dedicated IO die for scale-up networking, and HBM4/4E memory, utilizing Broadcom's advanced packaging capabilities to integrate multiple silicon dies into a high-performance AI inference accelerator. By incorporating Broadcom's scale-up Ethernet technologies, the system delivers low-latency, high-bandwidth all-to-all interconnect across hundreds of chips at rack scale.

</p><p xmlns="http://www.w3.org/1999/xhtml">
"Bringing together Broadcom's infrastructure capabilities and Furiosa's Tensor Contraction Processor architecture and its industry-defining software stack allows us to move beyond the chip level and deliver a comprehensive solution for the token factory era," said Furiosa Cofounder and CEO June Paik. "Having proven the performance and efficiency of our architecture with RNGD, our second-generation chip now in mass production with TSMC, we will deliver a third-generation inference solution that offers industry-leading performance per watt for even the largest, most complex frontier AI models and agentic workloads."

</p><p xmlns="http://www.w3.org/1999/xhtml">
The design is optimized for demanding real-world AI workloads, including intensive post-training sampling. By focusing on high-bandwidth data movement rather than the thread management required by GPUs, the chip will deliver higher performance-per-watt and greater token density than state-of-the-art GPUs.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Software designed for flexibility and developer velocity</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
Furiosa's hardware is supported by a software stack that enables developers to deploy quickly, meet demanding throughput and latency requirements, and easily switch to new frontier models and new optimization techniques.

</p><p xmlns="http://www.w3.org/1999/xhtml">
While legacy platforms require extensive hand-tuning of kernels for every new model, Furiosa's SDK leverages a general compiler that automatically maps high-level PyTorch code to silicon. For developers requiring more granular control, Furiosa's Virtual ISA offers a declarative programming model that provides hardware control without the non-deterministic complexity of traditional GPU programming.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Roadmap and availability</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
Sampling is scheduled to begin in the first half of 2028 to support the next decade of AI data center deployments.

</p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">About FuriosaAI</b>

</p><p xmlns="http://www.w3.org/1999/xhtml">
FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran engineers from AMD, Qualcomm, and Samsung, Furiosa operates globally with offices in Korea and Silicon Valley. The company has shipped two generations of AI chips based on our proprietary Tensor Contraction Processor (TCP) architecture. Its flagship product, RNGD, runs advanced large language models and agentic AI and is now in mass production. RNGD drops seamlessly into standard, air-cooled data centers to deliver unprecedented &#34;tokens per watt&#34; efficiency, supported by a mature SDK that eliminates the need for vast libraries of hand-tuned kernels. The company has raised $250M through Series C Bridge and works with leading global partners.

</p><p xmlns="http://www.w3.org/1999/xhtml">
For more information, visit furiosa.ai.

</p><p xmlns="http://www.w3.org/1999/xhtml"><img xmlns="http://www.w3.org/1999/xhtml" alt="" src="https://cts.businesswire.com/ct/CT?id=bwnews&amp;sty=20260527775773r2&amp;sid=benz2&amp;distro=nx&amp;lang=en" style="width:0;height:0"></img><span xmlns="http://www.w3.org/1999/xhtml" class="bwct31415"></span></p><p xmlns="http://www.w3.org/1999/xhtml" id="mmgallerylink"><span xmlns="http://www.w3.org/1999/xhtml" id="mmgallerylink-phrase">View source version on businesswire.com: </span><span xmlns="http://www.w3.org/1999/xhtml" id="mmgallerylink-link"><a xmlns="http://www.w3.org/1999/xhtml" href="https://www.businesswire.com/news/home/20260527775773/en/" rel="nofollow">https://www.businesswire.com/news/home/20260527775773/en/</a></span></p><p xmlns="http://www.w3.org/1999/xhtml">
<b xmlns="http://www.w3.org/1999/xhtml">Media contact: <a xmlns="http://www.w3.org/1999/xhtml" rel="nofollow" href="mailto:press@furiosa.ai" shape="rect">press@furiosa.ai</a></b>

</p>

Broadcom and FuriosaAI unveiled a strategic partnership to co-develop a third-generation AI accelerator, expanding RNGD's architecture into a scale-up rack-scale inference platform for hyperscale data centers. The collaboration combines Furiosa's TCP with Broadcom's Ethernet and packaging capabilities to address data movement bottlenecks, aiming for sampling in 1H2028 and mass production later.

FuriosaAI Partners with Broadcom to Build Next-generation Inference Platform for the Agentic Era

AI Summary

Sentiment Rationale

Trading Thesis

Market-Moving

Key Facts

Companies Mentioned

Industry News

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