Cadence expands TSMC partnership with A14 certification and N3P UALink
Near-term catalysts include A14 tool certification, N3P UALink deployment, and new IP; these factors can drive design-wins and licensing revs with TSMC-led AI/HPC programs.
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Near-term catalysts include A14 tool certification, N3P UALink deployment, and new IP; these factors can drive design-wins and licensing revs with TSMC-led AI/HPC programs.
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Cadence announced an expanded partnership with TSMC to advance AI/HPC design capabilities, including A14 process tool certification, UALink in N3P, and silicon IP for N3P/N2P. The collaboration aims to enable agentic AI chip and 3D-IC design flows across multiple TSMC nodes, potentially accelerating Cadence’s tool and IP adoption in a growing AI ecosystem.
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