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Astera Labs Joins Arm Total Design to Accelerate Custom AI Infrastructure Solutions

1. Astera Labs joins Arm Total Design to boost custom SoC development. 2. Collaboration focuses on chiplet solutions for AI infrastructure. 3. Shift toward modular architecture addresses limitations of traditional chip designs. 4. Astera's Intelligent Connectivity Platform enhances chiplet connectivity options. 5. Joint effort positions Astera for growth in AI architecture market.

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Why Bullish?

Astera's collaboration with Arm signifies increasing demand for customized AI infrastructure, potentially boosting market position like NVIDIA's AI-focused partnerships did previously.

How important is it?

The partnership expands Astera's market reach in AI infrastructure, indicating strong potential for growth and revenue.

Why Long Term?

The strategic alignment with Arm could sustain growth as AI infrastructure evolves, akin to how companies like AMD benefitted from their infrastructure partnerships over time.

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SAN JOSE, Calif., Oct. 14, 2025 (GLOBE NEWSWIRE) -- Astera Labs, Inc. (Nasdaq: ALAB), a leader in semiconductor-based connectivity solutions for rack-scale AI infrastructure, today announced it has joined Arm® Total Design, a comprehensive ecosystem dedicated to accelerating and simplifying custom SoC development based on Arm Neoverse™ Compute Subsystems (CSS). This collaboration will combine Astera Labs' Intelligent Connectivity Platform ecosystem with Arm Neoverse CSS to enable chiplet solutions that meet the growing demand for custom AI infrastructure. The complex integration requirements of rack-scale AI infrastructure are driving a shift toward chiplet-based designs. As AI workloads demand increasingly specialized processing capabilities, traditional monolithic chip designs are hitting yield and cost limitations at advanced process nodes, creating demand for more flexible architectures. Chiplet architectures enable AI platform developers to combine diverse processing units—including Arm compute subsystems alongside memory, networking, and acceleration components—into unified systems optimized for different functions. This modular approach achieves faster time-to-market through validated, reusable components while delivering the flexible, heterogeneous integration capabilities required by next-generation AI infrastructure. As a key design services partner in Arm Total Design, Astera Labs will provide multi-protocol chiplet capabilities through its Intelligent Connectivity Platform, offering comprehensive PCIe®, Ethernet, CXL®, and UALink™ connectivity solutions that enable customers to build custom AI infrastructure with validated, interoperable connectivity from day one. Astera Labs' proven ability to deliver first-to-market interconnect solutions, combined with extensive validation through the company's Cloud-Scale Interop Lab, fast-tracks customer designs from development to production, while reducing qualification risk. The collaboration combines Arm's compute subsystem expertise with Astera Labs' proven connectivity leadership, and aims to accelerate time-to-market, while supporting open standards-based platforms that leverage broad innovation, interoperability, and diverse multi-vendor supply chains. "The evolution to rack-scale AI infrastructure demands purpose-built solutions developed within open ecosystems, and our collaboration with Arm exemplifies this approach," said Sanjay Gajendra, president and chief operating officer at Astera Labs. "By integrating our Intelligent Connectivity Platform with Arm's Neoverse CSS products, we expect customers to build differentiated AI infrastructure that can scale from rack-level deployments to massive data center installations with the interoperability and choice that open standards provide." “As AI infrastructure scales, connectivity is fundamental for realizing the full potential of tightly integrated systems and meeting the power and performance demands of AI,” said Mohamed Awad, senior vice president and general manager, Infrastructure Business, Arm. “As part of the Arm Total Design ecosystem, Astera Labs will deliver proven expertise in rack-scale connectivity that will help our mutual customers navigate complexity and build differentiated AI solutions faster on Arm Neoverse CSS.” Through Arm Total Design, customers will gain access to a comprehensive ecosystem combining Astera Labs' connectivity expertise and design services with Arm's compute subsystems—positioning them to capitalize on the rapidly expanding custom AI infrastructure market. About Astera LabsAstera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions grounded in open standards. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up and scale-out connectivity. Discover more at www.asteralabs.com. Forward-Looking Statements This communication contains certain forward-looking statements regarding Astera Lab’s and Arm’s expectations with respect to the impact and benefits of Astera Labs joining the Arm Total Design Program that are introduced using words such as “aims,” “expected,” “positioning,” “will” and variations of such words and similar expressions. Such statements involve risks and uncertainties, many of which are beyond the control of Astera Labs and Arm, that could cause actual results to differ materially from those expressed or implied in the forward-looking statements, including, among others, the risk that we may be unable to successfully combine Astera Lab’s Intelligent Connectivity Platform with Arm's Neoverse CSS products; the expected benefits of the collaboration may not be realized; delays, disruptions, challenges or increased costs in the solutions covered by the collaboration; the complexities and uncertainties in developing and implementing solutions based on new technologies; litigation or disputes related to the collaboration or otherwise; macroeconomic conditions, including general semiconductor industry economic conditions; regulatory restrictions; international conflict and other risks and uncertainties described in Astera Lab’s Form 10-K, Form 10-Q and other filings with the SEC.   Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements, and no person assumes any obligation to update or revise any such forward-looking statements, whether as a result of new information, future events or otherwise, except to the extent that disclosure may be required by law. Press Contact:Peter Lo858-209-1896 peter.lo@asteralabs.com

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